The present invention relates to a MOS semiconductor integrated circuit incorporating a substrate bias voltage generator circuit, and more particularly, to such an integrated circuit that properly compensates for the threshold value after assembly process by controlling the substrate bias voltage using programmable elements.
Conventionally, a method available for connecting an output voltage from a substrate bias voltage generator circuit on the same MOS semiconductor integrated circuit to its own substrate not only provides MOS transistors with an optimum threshold value, but also makes it possible to gain a substantially extensive voltage operation margin by reducing the backgate effect, while ensuring satisfactory resistance against noise caused by the integrated circuit itself and by external input/output signals. In addition, such a method also provides a convenience for accelerating the operating speed of circuits due to reduced capacitance in the Pn junction portion. Reflecting these advantages, the above method has been widely used today. FIG. 5 shows one of the conventional substrate bias voltage generator circuits.
Reference number 1 indicates an oscillator circuit which causes the substrate bias voltage VBB to be generated by feeding its output signals .phi. to the charge pump circuit 2. Assuming that VT3 and VT4 respectively denote such threshold values by taking into consideration the possible backgate effect in respective MOS transistors 3 and 4 of the charge pump circuit 2 and VH also denotes the output voltage from the oscillator circuit, the ideal value of the substrate bias voltage output VBB is represented by VT3+VT4-VH. On the other hand, since a variety of processes are needed until MOS semiconductor integrated circuits are eventually formed on a substrate, the threshold value is unavoidably varied, and as a result, the greater the threshold value, the slower the circuit operation and the greater the difficulty in properly operating circuits using lowered voltages. Conversely, if the threshold value remains substantially low, it will cause the amount of current leakage from MOS transistors to increase. As a result, it is quite desirable to constrain such variation of the threshold value within a minimum range. Nevertheless, actually, there was no practical means for effectively compensating for such a variable threshold value inherent to any of the conventional semiconductor integrated circuit boards after completing assembly, thus an obstacle still exists against an urgent need for improving the actual yield of the assembled circuits.